The present invention relates in general to integrated circuit, and in particular to a digitally controlled tuner circuit for continuous-time filters.
To implement a continuous-time filter, various techniques are available. One widely used approach employs well-known transconductance-capacitor (or gm-C) techniques, while another approach relies on the resistor-MOS transistor-capacitor (RMC) architecture. A typical tuner-assisted continuous-time filter implemented using either of these two approaches is subject to increased distortion and degraded noise performance due to the presence of non-linear devices such as transconductance elements in the g.sub.m -C architecture or current steering MOS devices in the RMC architecture. Another method of implementing a continuous-time filter is based on the active RC (RCA) type architecture. Active RC filters are known to have good harmonic performance that is mainly limited by the performance of the operational amplifier (opamp). The noise performance of the RCA filter is also limited mainly by the opamp and the choice of resistor values. The main performance problem with the RCA type filters, however, is the variation of their frequency response due to the variations in fabrication process and temperature. The unity-gain frequency of an (RCA) integrator can change by e.g., -30% to +59% when the resistor value changes by .+-.30% and the capacitor value by .+-.10%.
There is a need for continuous-time filters with improved performance over process and temperature variations.